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CD4086BMS
December 1992
CMOS Expandable 4-Wide 2-Input AND-OR-INVERT Gate
Pinout
CD4086BMS TOP VIEW
Features
* Medium Speed Operation - tPHL = 90ns; tPLH = 140ns (Typ.) at 10V * High Voltage Type (20V Rating) * INHIBIT and ENABLE Inputs * Buffered Outputs * 100% Tested for Quiescent Current at 20V * Maximum Input Current of 1A at 18V Over Full Package Temperature Range; 100nA at 18V and +25oC * Noise Margin (Over Full Package/Temperature Range) - 1V at VDD = 5V - 2V at VDD = 10V - 2.5V at VDD = 15V * Standardized Symmetrical Output Characteristics * 5V, 10V and 15V Parametric Ratings * Meets All Requirements of JEDEC Tentative Standard No. 13B, "Standard Specifications for Description of `B' Series CMOS Devices"
A1 B2 J = INH + ENABLE + AB + CD + EF + GH 3 NC 4 E5 F6 VSS 7
14 VDD 13 D 12 C 11 ENABLE/EXP 10 INHIBIT/EXP 9H 8G
NC = NO CONNECTION
Functional Diagram
10 INHIBIT/EXP
Description
CD4086BMS contains one 4-wide 2-input AND-OR-INVERT gate with an INHIBIT/EXP input and an ENABLE/EXP input. For a 4-wide A-O-I function INHIBIT/EXP is tied to VSS and ENABLE/EXP to VDD. See Figure 2 and its associated explanation for applications where a capability greater than 4-wide is required. The CD4076B is supplied in these 14 lead outline packages: Braze Seal DIP Frit Seal DIP Ceramic Flatpack H4H H1B H4F
G H A B 1 2
C D E F
12 13 3 J 5 6 LOGIC 1 HIGH LOGIC 0 LOW VDD = 14 VSS = 7 NC = 4
8 9 11 ENABLE/EXP
J = INH + ENABLE + AB + CD + EF + GH
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 321-724-7143 | Copyright (c) Intersil Corporation 1999
File Number
3328
7-1055
Specifications CD4086BMS
Absolute Maximum Ratings
DC Supply Voltage Range, (VDD) . . . . . . . . . . . . . . . -0.5V to +20V (Voltage Referenced to VSS Terminals) Input Voltage Range, All Inputs . . . . . . . . . . . . .-0.5V to VDD +0.5V DC Input Current, Any One Input . . . . . . . . . . . . . . . . . . . . . . . .10mA Operating Temperature Range . . . . . . . . . . . . . . . . -55oC to +125oC Package Types D, F, K, H Storage Temperature Range (TSTG) . . . . . . . . . . . -65oC to +150oC Lead Temperature (During Soldering) . . . . . . . . . . . . . . . . . +265oC At Distance 1/16 1/32 Inch (1.59mm 0.79mm) from case for 10s Maximum
Reliability Information
Thermal Resistance . . . . . . . . . . . . . . . . ja jc Ceramic DIP and FRIT Package . . . . . 80oC/W 20oC/W Flatpack Package . . . . . . . . . . . . . . . . 70oC/W 20oC/W o Maximum Package Power Dissipation (PD) at +125 C For TA = -55oC to +100oC (Package Type D, F, K) . . . . . . 500mW For TA = +100oC to +125oC (Package Type D, F, K) . . . . . Derate Linearity at 12mW/oC to 200mW Device Dissipation per Output Transistor . . . . . . . . . . . . . . . 100mW For TA = Full Package Temperature Range (All Package Types) Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +175oC
TABLE 1. DC ELECTRICAL PERFORMANCE CHARACTERISTICS GROUP A SUBGROUPS 1 2 VDD = 18V, VIN = VDD or GND Input Leakage IIL VIN = VDD or GND VDD = 20 VDD = 18V Input Leakage IIH VIN = VDD or GND VDD = 20 VDD = 18V Output Voltage Output Voltage Output Current (Sink) Output Current (Sink) Output Current (Sink) Output Current (Source) Output Current (Source) Output Current (Source) Output Current (Source) N Threshold Voltage P Threshold Voltage Functional VOL15 VOH15 IOL5 IOL10 IOL15 IOH5A IOH5B IOH10 IOH15 VNTH VPTH F VDD = 15V, No Load VDD = 15V, No Load (Note 3) VDD = 5V, VOUT = 0.4V VDD = 10V, VOUT = 0.5V VDD = 15V, VOUT = 1.5V VDD = 5V, VOUT = 4.6V VDD = 5V, VOUT = 2.5V VDD = 10V, VOUT = 9.5V VDD = 15V, VOUT = 13.5V VDD = 10V, ISS = -10A VSS = 0V, IDD = 10A VDD = 2.8V, VIN = VDD or GND VDD = 20V, VIN = VDD or GND VDD = 18V, VIN = VDD or GND VDD = 3V, VIN = VDD or GND Input Voltage Low (Note 2) Input Voltage High (Note 2) Input Voltage Low (Note 2) Input Voltage High (Note 2) VIL VIH VIL VIH VDD = 5V, VOH > 4.5V, VOL < 0.5V VDD = 5V, VOH > 4.5V, VOL < 0.5V VDD = 15V, VOH > 13.5V, VOL < 1.5V VDD = 15V, VOH > 13.5V, VOL < 1.5V 3 1 2 3 1 2 3 1, 2, 3 1, 2, 3 1 1 1 1 1 1 1 1 1 7 7 8A 8B 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 +25oC, LIMITS TEMPERATURE +25oC +125 C -55oC +25oC +125oC -55oC +25oC +125oC -55oC +125oC, +25oC +25oC +25oC +25oC +25oC +25oC +25oC +25oC +25oC +25oC +25oC +125oC -55oC +25oC, +125oC, -55oC +25oC, +125oC, -55oC +25oC, +125oC, -55oC +25oC, +125oC, -55oC 3.5 11 1.5 4 V V V V -55oC
o
PARAMETER Supply Current
SYMBOL IDD
CONDITIONS (NOTE 1) VDD = 20V, VIN = VDD or GND
MIN -100 -1000 -100 0.53 1.4 3.5 -2.8 0.7
MAX 2 200 2 100 1000 100 50 -0.53 -1.8 -1.4 -3.5 -0.7 2.8
UNITS A A A nA nA nA nA nA nA mV V mA mA mA mA mA mA mA V V V
+25oC, +125oC, -55oC 14.95
VOH > VOL < VDD/2 VDD/2
NOTES: 1. All voltages referenced to device GND, 100% testing being implemented. 2. Go/No Go test with limits applied to inputs.
3. For accuracy, voltage is measured differentially to VDD. Limit is 0.050V max.
7-1056
Specifications CD4086BMS
TABLE 2. AC ELECTRICAL PERFORMANCE CHARACTERISTICS GROUP A SUBGROUPS TEMPERATURE 9 10, 11 TPLH1 VDD = 5V, VIN = VDD or GND 9 10, 11 TPHL2 VDD = 5V, VIN = VDD or GND 9 10, 11 TPLH2 VDD = 5V, VIN = VDD or GND 9 10, 11 TTHL TTLH VDD = 5V, VIN = VDD or GND 9 10, 11 +25oC +125oC, -55oC LIMITS MIN MAX 450 608 620 837 300 405 500 675 200 270 UNITS ns ns ns ns ns ns ns ns ns ns
PARAMETER Propagation Delay DATA Propagation Delay DATA Propagation Delay INHIBIT Propagation Delay INHIBIT Transition Time
SYMBOL TPHL1
CONDITIONS (NOTES 1, 2) VDD = 5V, VIN = VDD or GND
+25oC +125oC, -55oC
+25oC +125oC, -55oC
+25oC +125oC, -55oC
+25oC +125oC, -55oC
NOTES: 1. CL = 50pF, RL = 200K, Input TR, TF < 20ns. 2. -55oC and +125oC limits guaranteed, 100% testing being implemented. TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS LIMITS PARAMETER Supply Current SYMBOL IDD CONDITIONS VDD = 5V, VIN = VDD or GND NOTES 1, 2 TEMPERATURE -55oC, +25oC +125oC VDD = 10V, VIN = VDD or GND 1, 2 -55oC, +25oC +125oC VDD = 15V, VIN = VDD or GND 1, 2 -55oC, +25oC +125oC Output Voltage Output Voltage Output Voltage Output Voltage Output Current (Sink) VOL VOL VOH VOH IOL5 VDD = 5V, No Load VDD = 10V, No Load VDD = 5V, No Load VDD = 10V, No Load VDD = 5V, VOUT = 0.4V 1, 2 1, 2 1, 2 1, 2 1, 2 +25oC, +125oC, -55oC +25oC, +125oC, -55oC +25oC, +125oC, -55oC +25oC, +125oC, -55oC +125oC -55oC Output Current (Sink) IOL10 VDD = 10V, VOUT = 0.5V 1, 2 +125oC -55oC Output Current (Sink) IOL15 VDD = 15V, VOUT = 1.5V 1, 2 +125oC -55oC Output Current (Source) IOH5A VDD = 5V, VOUT = 4.6V 1, 2 +125oC -55oC Output Current (Source) IOH5B VDD = 5V, VOUT = 2.5V 1, 2 +125oC -55oC Output Current (Source) IOH10 VDD = 10V, VOUT = 9.5V 1, 2 +125oC -55oC 4.95 9.95 0.36 0.64 0.9 1.6 2.4 4.2 50 -0.36 -0.64 -1.15 -2.0 -0.9 -2.6 mV V V mA mA mA mA mA mA mA mA mA mA mA mA MIN MAX 1 30 2 60 2 120 50 UNITS A A A A A A mV
7-1057
Specifications CD4086BMS
TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS (Continued) LIMITS PARAMETER Output Current (Source) SYMBOL IOH15 CONDITIONS VDD =15V, VOUT = 13.5V NOTES 1, 2 TEMPERATURE +125oC -55 C Input Voltage Low Input Voltage High Propagation Delay DATA Propagation Delay DATA Propagation Delay INHIBIT Propagation Delay INHIBIT Transition Time VIL VIH TPHL1 VDD = 10V, VOH > 9V, VOL < 1V VDD = 10V, VOH > 9V, VOL < 1V VDD = 10V VDD = 15V TPLH1 VDD = 10V VDD = 15V TPHL2 VDD = 10V VDD = 15V TPLH2 VDD = 10V VDD = 15V TTHL1 TTLH1 CIN VDD = 10V VDD = 15V Any Input 1, 2 1, 2 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2 +25oC, +125oC, -55oC +25oC, +125oC, -55oC +25oC +25oC +25 C +25 C +25oC +25oC +25oC +25oC +25 C +25oC +25oC
o o o o
MIN 7 -
MAX -2.4 -4.2 3 180 120 250 180 120 80 200 140 100 80 7.5
UNITS mA mA V V ns ns ns ns ns ns ns ns ns ns pF
Input Capacitance NOTES:
1. All voltages referenced to device GND. 2. The parameters listed on Table 3 are controlled via design or process and are not directly tested. These parameters are characterized on initial design release and upon design changes which would affect these characteristics. 3. CL = 50pF, RL = 200K, Input TR, TF < 20ns. TABLE 4. POST IRRADIATION ELECTRICAL PERFORMANCE CHARACTERISTICS LIMITS PARAMETER Supply Current N Threshold Voltage N Threshold Voltage Delta P Threshold Voltage P Threshold Voltage Delta Functional SYMBOL IDD VNTH VTN VTP VTP F CONDITIONS VDD = 20V, VIN = VDD or GND VDD = 10V, ISS = -10A VDD = 10V, ISS = -10A VSS = 0V, IDD = 10A VSS = 0V, IDD = 10A VDD = 18V, VIN = VDD or GND VDD = 3V, VIN = VDD or GND Propagation Delay Time TPHL TPLH VDD = 5V 1, 2, 3, 4 +25oC NOTES 1, 4 1, 4 1, 4 1, 4 1, 4 1 TEMPERATURE +25
oC
MIN -2.8 0.2 VOH > VDD/2 -
MAX 7.5 -0.2 1 2.8 1 VOL < VDD/2 1.35 x +25oC Limit
UNITS A V V V V V
+25oC +25oC +25oC +25oC +25oC
ns
NOTES: 1. All voltages referenced to device GND. 2. CL = 50pF, RL = 200K, Input TR, TF < 20ns.
3. See Table 2 for +25oC limit. 4. Read and Record
TABLE 5. BURN-IN AND LIFE TEST DELTA PARAMETERS +25OC PARAMETER Supply Current - MSI-1 Output Current (Sink) Output Current (Source) SYMBOL IDD IOL5 IOH5A 0.2A 20% x Pre-Test Reading 20% x Pre-Test Reading DELTA LIMIT
7-1058
Specifications CD4086BMS
TABLE 6. APPLICABLE SUBGROUPS CONFORMANCE GROUP Initial Test (Pre Burn-In) Interim Test 1 (Post Burn-In) Interim Test 2 (Post Burn-In) PDA (Note 1) Interim Test 3 (Post Burn-In) PDA (Note 1) Final Test Group A Group B Subgroup B-5 Subgroup B-6 Group D MIL-STD-883 METHOD 100% 5004 100% 5004 100% 5004 100% 5004 100% 5004 100% 5004 100% 5004 Sample 5005 Sample 5005 Sample 5005 Sample 5005 GROUP A SUBGROUPS 1, 7, 9 1, 7, 9 1, 7, 9 1, 7, 9, Deltas 1, 7, 9 1, 7, 9, Deltas 2, 3, 8A, 8B, 10, 11 1, 2, 3, 7, 8A, 8B, 9, 10, 11 1, 2, 3, 7, 8A, 8B, 9, 10, 11, Deltas 1, 7, 9 1, 2, 3, 8A, 8B, 9 Subgroups 1, 2 3 Subgroups 1, 2, 3, 9, 10, 11 IDD, IOL5, IOH5A READ AND RECORD IDD, IOL5, IOH5A IDD, IOL5, IOH5A IDD, IOL5, IOH5A
NOTE: 1. 5% Parameteric, 3% Functional; Cumulative for Static 1 and 2.
TABLE 7. TOTAL DOSE IRRADIATION MIL-STD-883 METHOD 5005 TEST PRE-IRRAD 1, 7, 9 POST-IRRAD Table 4 READ AND RECORD PRE-IRRAD 1, 9 POST-IRRAD Table 4
CONFORMANCE GROUPS Group E Subgroup 2
TABLE 8. BURN-IN AND IRRADIATION TEST CONNECTIONS OSCILLATOR FUNCTION Static Burn-In 1 Note 1 Static Burn-In 2 Note 1 Dynamic BurnIn Note 1 Irradiation Note 2 NOTES: 1. Each pin except VDD and GND will have a series resistor of 10K 5%, VDD = 18V 0.5V 2. Each pin except VDD and GND will have a series resistor of 47K 5%; Group E, Subgroup 2, sample size is 4 dice/wafer, 0 failures, VDD = 10V 0.5V OPEN 3, 4 3, 4 4 3, 4 GROUND 1, 2, 5 - 13 7 7 7 VDD 14 1, 2, 5, 6, 8 - 14 14 1, 2, 5, 6, 8 - 14 3 1, 2, 5, 6, 8, 9, 12, 13 10, 11 9V -0.5V 50kHz 25kHz
7-1059
CD4086BMS
VDD
p
p p n p p p p
*
A 1 n
*
B 2 p p
n
*
C 12 n
n
*
D 13 p p
n p VDD
n
n
n
p
p
p
*
E 5 n n n n n n 3 J
*
F 6 p
p
VSS TERM 14 = VDD TERM 7 = VSS VDD VSS
n
*
G H 8
*
9
n
*
ENABLE/EXP INHIBIT/EXP 11 10
*
* ALL INPUTS PROTECTED BY
CMOS PROTECTION NETWORK
VSS
FIGURE 1. SCHEMATIC DIAGRAM
INHIBIT/EXP1 A1 B1 C1 D1 E1 F1 G1 H1 VDD ENABLE/EXP1 J2 = A1 B1 + C1 D1 + E1 FE + G1 H1 + A2 B2 + C2 D2 + E2 F2 + G2 H2 J1 VSS INHIBIT/EXP2 VSS A2 B2 C2 D2 J2 E2 F2 G2 H2 ENABLE/EXP2
FIGURE 2. TWO CD4086BMS'S CONNECTED AS AN 8-WIDE 2-INPUT A-O-I GATE
Figure 2 above shows two CD4086's utilized to obtain 8-wide 2-input A-O-I function. The output (J1) of one CD4086 is fed directly to the ENABLE/EXP2 line of the second CD4086. In a similar fashion, any NAND gate output can be fed directly
into the ENABLE/EXP input to obtain a 5-wide A-O-I function. In addition, and AND gate output can be fed directly into the INHIBIT/EXP input with the same result.
7-1060
CD4086BMS Typical Performance Characteristics
AMBIENT TEMPERATURE (TA) = +25oC 15 OUTPUT VOLTAGE (VO) - V SUPPLY VOLTAGE (VDD) = 15V VDD CURRENT PEAK 10V VI 10 14 VO CURRENT PEAK 5V 3 11 VDD 1 VDD 0 0 5 10 15 0 5 INPUT VOLTAGE (VI) - V 10 15 INPUT VOLTAGE (VI) - V 7 VSS ID 2 4 VDD 5 DRAINCURRENT (ID) - mA 6 OUTPUT VOLTAGE (VO) - V 15 MIN MAX VDD 10 VI 10 5 11 7 VSS 14 VO ID VDD AMBIENT TEMPERATURE (TA) = +25oC
10
5
FIGURE 3. TYPICAL VOLTAGE AND CURRENT TRANSFER CHARACTERISTICS
AMBIENT TEMPERATURE (TA) = +25oC
FIGURE 4. MINIMUM AND MAXIMUM VOLTAGE TRANSFER CHARACTERISTICS
AMBIENT TEMPERATURE (TA) = +25oC
OUTPUT LOW (SINK) CURRENT (IOL) (mA)
OUTPUT LOW (SINK) CURRENT (IOL) (mA)
30 25 20 15 10 5
GATE-TO-SOURCE VOLTAGE (VGS) = 15V
15.0 GATE-TO-SOURCE VOLTAGE (VGS) = 15V 12.5 10.0 7.5 5.0 2.5 10V
10V
5V 0 5 10 15 DRAIN-TO-SOURCE VOLTAGE (VDS) (V)
5V 0 5 10 15 DRAIN-TO-SOURCE VOLTAGE (VDS) (V)
FIGURE 5. TYPICAL OUTPUT LOW (SINK) CURRENT CHARACTERISTICS
DRAIN-TO-SOURCE VOLTAGE (VDS) (V) -15 -10 -5 AMBIENT TEMPERATURE (TA ) = +25oC GATE-TO-SOURCE VOLTAGE (VGS) = -5V
FIGURE 6. MINIMUM OUTPUT LOW (SINK) CURRENT CHARACTERISTICS
AMBIENT TEMPERATURE (TA) = +25oC OUTPUT HIGH (SOURCE) CURRENT (IOH) (mA) TRANSITION TIME (tTHL, tTLH) (ns)
0
0 -5 -10 -15
200 SUPPLY VOLTAGE (VDD) = 5V
150
-10V
-20 -25
100 10V 50 15V
-15V
-30
0 0
20
40 60 80 100 LOAD CAPACITANCE (CL) (pF)
FIGURE 7. TYPICAL OUTPUT HIGH (SOURCE) CURRENT CHARACTERISTICS
FIGURE 8. TYPICAL TRANSITION TIME vs LOAD CAPACITANCE
7-1061
CD4086BMS Typical Performance Characteristics (Continued)
105 POWER DISSIPATION (PD) (W) AMBIENT TEMPERATURE (TA) = +25oC DRAIN-TO-SOURCE VOLTAGE (VDS) (V) -15 -10 -5 AMBIENT TEMPERATURE (TA) = +25oC GATE-TO-SOURCE VOLTAGE (VGS) = -5V SUPPLY VOLTAGE (VDD) = 15V 103 10V 102 5V CL = 50pF CL = 15pF -10V -10 -5 10V 0
0 OUTPUT HIGH (SOURCE) CURRENT (IOH) (mA)
10
4
101
-15V
-15
100 10-1 100 101 102 103 104
FREQUENCY (f) (kHz)
FIGURE 9. TYPICAL POWER DISSIPATION vs FREQUENCY
300 HIGH-TO-LOW LEVEL PROPAGATION DELAY TIME (tPHL) - ns 250 AMBIENT TEMPERATURE (TA) = +25oC SUPPLY VOLTAGE (VDD) = 5V
FIGURE 10. MINIMUM OUTPUT HIGH (SOURCE) CURRENT CHARACTERISTICS
AMBIENT TEMPERATURE (TA) = +25oC LOW-TO-HIGH LEVEL PROPAGATION DELAY TIME (tPLH) (ns) 500
200
400
SUPPLY VOLTAGE (VDD) = 5V
150 10V
300
100
200 10V 100 15V 0 20 40 60 80 100 LOAD CAPACITANCE (CL) (pF)
50
15V
0
20 40 60 80 100 LOAD CAPACITANCE (CL) - pF
FIGURE 11. TYPICAL DATA OR ENABLE HIGH-TO-LOW LEVEL PROPAGATION DELAY TIME vs LOAD CAPACITANCE
PROPAGATION DELAY TIME (tPHL, tPLH) (ns)
FIGURE 12. TYPICAL DATA OR ENABLE LOW-TO-HIGH LEVEL PROPAGATION DELAY TIME vs LOAD CAPACITANCE
AMBIENT TEMPERATURE (TA) = +25oC LOAD CAPACITANCE (CL) = 50pF 1250 1000 tPLH 750 500 tPHL 250
0
2.5
5
7.5
10
12.5
15
17.5
20
SUPPLY VOLTAGE (VDD) (V)
FIGURE 13. TYPICAL DATA OR ENABLE PROPAGATION DELAY TIME vs SUPPLY VOLTAGE
7-1062
CD4086BMS Chip Dimensions and Pad Layout
Dimensions in parenthesis are in millimeters and are derived from the basic inch dimensions as indicated. Grid graduations are in mils (10-3 inch).
METALLIZATION: PASSIVATION:
Thickness: 11kA - 14kA,
AL.
10.4kA - 15.6kA, Silane
BOND PADS: 0.004 inches X 0.004 inches MIN DIE THICKNESS: 0.0198 inches - 0.0218 inches
All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification.
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see web site http://www.intersil.com
Sales Office Headquarters
NORTH AMERICA Intersil Corporation P. O. Box 883, Mail Stop 53-204 Melbourne, FL 32902 TEL: (321) 724-7000 FAX: (321) 724-7240 EUROPE Intersil SA Mercure Center 100, Rue de la Fusee 1130 Brussels, Belgium TEL: (32) 2.724.2111 FAX: (32) 2.724.22.05 ASIA Intersil (Taiwan) Ltd. Taiwan Limited 7F-6, No. 101 Fu Hsing North Road Taipei, Taiwan Republic of China TEL: (886) 2 2716 9310 FAX: (886) 2 2715 3029
1063

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